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Synopsys Inc

Image source: Freebase

Type: Company

Name: Synopsys Inc

First reported 2 hours ago - Updated 2 hours ago - 1 reports

OCZ Technology

OCZ Technology Group Achieves ...

Synopsys, Inc. (Nasdaq: SNPS),a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems,today announced that OCZ Technology Group, Inc. (OCZ) has achieved first-pass silicon success for its NAND ... [Published EFYTimes.com - 2 hours ago]

Entities: Synopsys Inc, OCZ Technology, Vector, Silicon, IP Integration

First reported 6 hours ago - Updated 6 hours ago - 1 reports

"Raiders of the Lost Article" by Tom Anderson

Tom Anderson, VP of Marketing, Breker Verification SystemsTom Anderson is vice president of Marketing for Breker Verification Systems. He previously served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical ... [Published EDA Café - 6 hours ago]

Entities: Thomas Anderson, Synopsys Inc, Application-Specific Integrated Circuit, Product Management

First reported Jun 17 2013 - Updated 11 hours ago - 2 reports

Formality tackles ECOs

Some products don’t get a lot of love and attention. They are considered mainstream products and they go through many minor improvement cycles, but few of these changes are enough to attract a lot of attention. One of these products in the Synopsys fold ... [Published EE Times - 11 hours ago]

Entities: Designline, Compiler, Synopsys Inc

First reported 12 hours ago - Updated 12 hours ago - 2 reports

Synopsys Supports Local Youth for Global Volunteer Week

During the week of May 11-18, 2013 Synopsys held its first Global Volunteer Week at five sites: Bangalore, India; Hillsboro, Oregon; Mountain View, California; Hsinchu and Taipei Taiwan; and Shanghai, China. In total, nearly 800 Synopsys employees, family, ... [Published Synopsys.com - 12 hours ago]

Entities: Synopsys Inc, Taiwan, Shanghai, Taipei

First reported Jun 18 2013 - Updated 14 hours ago - 3 reports

Imagination Technologies Group PLC

Optimizing performance, power, and area in processors to meet increasing demands

Mobile device, set-top box, base station, and server-class processors all need to increase performance, reduce power draw, reduce turnaround time, and reduce area to keep costs down. Previously, to optimize on-chip IP cores, SoC designers needed individual ... [Published DSP-FPGA - 14 hours ago]

Entities: Synopsys Inc, Memory, VeriSilicon Holdings Co Ltd, Imagination Technologies Group PLC, Cellular Base Station

First reported Jun 17 2013 - Updated 23 hours ago - 2 reports

Synopsys Inc

Synopsys Doubles Speed for Implementing and Verifying Functional ECOs

-- Synopsys, Inc. today announced Formality Ultra, a new configuration of the Formality equivalency checking software. Formality Ultra includes innovative matching and verification technologies to efficiently guide designers through the implementation ... [Published Analog and DSP - Jun 18 2013]

Entities: Synopsys Inc

First reported Jun 18 2013 - Updated Jun 18 2013 - 1 reports

Saratoga High School

Saratoga: David Zarrin's accomplishment are out of this world--literally!

Most high school seniors don't catch the attention and interest of Boeing. But then, few high school seniors get a planet named after them, either. At the age of 18, David Zarrin can say he's done both.The Saratoga High School senior competed in the prestigious ... [Published San Jose Mercury News - Jun 18 2013]

Entities: Synopsys Inc, Mechanical Engineering, Precipitation, Saratoga High School, Applied Mechanics

First reported Jun 18 2013 - Updated Jun 18 2013 - 1 reports

SATA PHY, TSMC 65GP, x2

Synopsys' DesignWare® SATA PHY IP is designed for use in system-on-chip (SoC) solutions. The DesignWare SATA PHY IP integrates seamlessly with Synopsys' DesignWare SATA Host & Device Controller IP core to reduce design time and achieve first-pass silicon ... [Published Design and Reuse - Jun 18 2013]

Entities: Synopsys Inc, Taiwan Semiconductor Manufacturing Co Ltd, System-on-a-Chip, Interoperability

First reported Jun 17 2013 - Updated Jun 17 2013 - 1 reports

Memory and logic libraries for optimal design of SoC

The new DesignWare HPC (High Performance Core) Design Kit from Synopsys packs high-speed and high-density memory instances and standard cell libraries for SoC chip design engineers to optimize their on-chip traditional processing, graphic processing and ... [Published Electronics Engineering Herald - Jun 17 2013]

Entities: Synopsys Inc, Memory, VeriSilicon Holdings Co Ltd, Mark Dunn

First reported Jun 17 2013 - Updated Jun 17 2013 - 1 reports

Test tech from Synopsys can test several silicon dies at one time and faster

Synopsys unveiled a new, innovative test technology to further reduce the cost of testing silicon devices by delivering up to 3x higher test compression and minimizing the time required to test each silicon die. The new technology also uses fewer pins ... [Published Electronics Engineering Herald - Jun 17 2013]

Entities: Synopsys Inc, Silicon, Compiler, STMicroelectronics NV

First reported Jun 13 2013 - Updated Jun 14 2013 - 2 reports

Creating highly reliable FPGA designs

Angela Sutton, SynopsysRadiation-induced soft errors – "glitches" – became widely known in the 1970s with the introduction of dynamic RAM chips. The problem emerged as a result of radioactive contaminants in chip packaging, which emit alpha particles ... [Published Design and Reuse - Jun 14 2013]

Entities: Transient, Synopsys Inc, Electron, Contaminate

First reported Jun 12 2013 - Updated Jun 13 2013 - 2 reports

DesignWare HPC Kit expanded for core optimisation

Keywords:Synopsys embedded memory logic library IPSynopsys recently announced an extention to its DesignWare duet embedded memory and logic library IP portfolio, which is designed to enable the optimised implementation of a broad range of processor ... [Published Electronic Engineering Times Asia - Jun 13 2013]

Entities: Synopsys Inc, Memory, Mark Dunn, Imagination Technologies Group PLC, Density

Quotes

...Shakeel Peera, director of marketing for terrestrial programmable PLD product at Microsemi, calls the resultant IGLOO2 "a leader in cost-optimized mainstream FPGAs that we will position against families such as Cyclone V "

Microsemi adds security, nonvolatile robustness to a denser IGLOO2 family [Published EDN.com - 18 hours ago]

..."We have very good timing tools," he said. "The routing interconnect is unique - its a totally different architecture with asymmetric delays through the logic and that gives us flexibility in the timing."

IGLOO2 flash FPGA targets integration and security [Published EE Times Europe - 21 hours ago]

"Mechanical engineering is related to surgery more than most people realize" he said. "Basically, it's putting things together and taking it apart."

Saratoga: David Zarrin's accomplishment are out of this world--literally! [Published San Jose Mercury News - Jun 18 2013]

...compared to existing solutions," said Roberto Mattiuzzo, SoC test and diagnosis manager at STMicroelectronics Central CAD and Design Solutions. "The technology can be deployed on a variety of design styles with any number of test pins and supports high-speed test clocks. It is well aligned with our ever-increasing requirements to lower the cost and raise the quality of test for our silicon products using our current and ready-for-production fabrication process."

Test tech from Synopsys can test several silicon dies at one time and faster [Published Electronics Engineering Herald - Jun 17 2013]

More Content

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âBig Glassâ and Visions for the Future are on t... [Published Street Insider - 2 hours ago]
OCZ Technology Group Achieves ... [Published EFYTimes.com - 2 hours ago]
"Raiders of the Lost Article" by Tom Anderson [Published EDA Café - 6 hours ago]
Formality tackles ECOs [Published EE Times - 11 hours ago]
Microsemi introduces highly-integrated IGLOO2 F... [Published EE Times - 11 hours ago]
Synopsys Supports Local Youth for Global Volunt... [Published Synopsys.com - 12 hours ago]
Synopsys Goes Back to School for Global Volunte... [Published Synopsys.com - 12 hours ago]
Optimizing performance, power, and area in proc... [Published DSP-FPGA - 14 hours ago]
EDA tool optimizes cell libraries for processor... [Published EDN.com - 15 hours ago]
Microsemi adds security, nonvolatile robustness... [Published EDN.com - 18 hours ago]
IGLOO2 flash FPGA targets integration and security [Published EE Times Europe - 21 hours ago]
EDA; Equivalence checking tool doubles speed of... [Published EDN Europe - 23 hours ago]
Transaction-based Verification And Emulation Co... [Published Electronic Design - Jun 18 2013]
Synopsys Doubles Speed for Implementing and Ver... [Published Analog and DSP - Jun 18 2013]
Saratoga: David Zarrin's accomplishment are out... [Published San Jose Mercury News - Jun 18 2013]
Saratoga: Congratulations to the graduates in t... [Published San Jose Mercury News - Jun 18 2013]
High-Performance Computing Design Kit Optimizes... [Published Electronic Design - Jun 18 2013]
SATA PHY, TSMC 65GP, x2 [Published Design and Reuse - Jun 18 2013]
Sysnopsys' Formality Ultra Speeds the... by Ham... [Published Chip Design Magazine - Jun 17 2013]
Hedge Funds Are Dumping Advanced Semiconductor ... [Published InsiderMonkey.com - Jun 17 2013]
Mergers, Philanthropic Excellence and Cost-Effe... [Published PR Newswire - Jun 17 2013]
Synopsys Delivers 2X Speedup for Implementing a... [Published Business Technology - Jun 17 2013]
Low Power Design for Testability [Published Design and Reuse - Jun 17 2013]
Test tech from Synopsys can test several silico... [Published Electronics Engineering Herald - Jun 17 2013]
Memory and logic libraries for optimal design o... [Published Electronics Engineering Herald - Jun 17 2013]
Synopsys Optimizes DesignWare HPC Design Kit fo... [Published Embedded Star - Jun 16 2013]
Synopsys and Russia's National Research Univers... [Published AfterDawn.com - Jun 16 2013]
High-Throughput FPGA Signal Processing: Trends,... [Published EE Times - Jun 15 2013]
"TSMC Ecosystem Moving Online" by Tom Quan [Published EDA Café - Jun 15 2013]
Imperas Delivers Next Generation Embedded Softw... [Published Embedded Technology.com - Jun 14 2013]

Blogs

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Synopsys (SNPS) Trading Near $37.31 Resistance ... [Published MarketIntelligenceCenter.com - Jun 14 2013] Synopsys Inc (NASDAQ: SNPS) closed Thursday's trading session at $36.63. In the past year, the stock has hit a 52-week low of $27.74 and 52-week high of $37.02. Synopsys (SNPS) stock has been showing support around $35.57 and resistance in the $37.31 ...
Zumiez President Sells 63K Shares and 4 Insider... [Published Wall St. Cheat Sheet - Jun 10 2013] Kilbourne Lynn K who is President & GMM at Zumiez, Inc. ( NASDAQ:ZUMZ ), sold 63,971 shares at $30.95 per share for a total value of $1,979,642. The shares recently traded at $31.34, up $0.39, or 1.26% since the insider sale.NEW! Discover a new stock ...
Zumiez President Sells 63K Shares and 4 Insider... [Published Wall St. Cheat Sheet - Jun 10 2013] Kilbourne Lynn K who is President & GMM at Zumiez, Inc. ( NASDAQ:ZUMZ ), sold 63,971 shares at $30.95 per share for a total value of $1,979,642. The shares recently traded at $31.34, up $0.39, or 1.26% since the insider sale. NEW! Discover a ...
Synopsys (SNPS) Could Break Through $37.29 Resi... [Published MarketIntelligenceCenter.com - Jun 10 2013] Synopsys Inc (NASDAQ: SNPS) closed Friday's trading session at $36.98. In the past year, the stock has hit a 52-week low of $27.74 and 52-week high of $37.00. Synopsys (SNPS) stock has been showing support around $36.41 and resistance in the $37.29 range. ...
Synopsys (SNPS) Showing Bullish Technicals With... [Published MarketIntelligenceCenter.com - Jun 04 2013] Synopsys Inc (NASDAQ: SNPS) closed Monday's trading session at $36.71. In the past year, the stock has hit a 52-week low of $27.74 and 52-week high of $36.81. Synopsys (SNPS) stock has been showing support around $35.99 and resistance in the $37.15 range. ...

Press Releases

sort by: Date \| Relevance
Mergers, Philanthropic Excellence and Cost-Effe... [Published PR Newswire - Jun 17 2013]
IEEE 1801™-2013 Designed to Improve Energy Effi... [Published Business Wire - May 30 2013]
IEEE Standards Association Symposium on EDA Int... [Published Business Wire - May 30 2013]
TSMC Certifies Synopsys' Digital and Custom Sol... [Published PR Newswire: General Business - May 29 2013]
Synopsys Introduces Starter Kit for DesignWare ... [Published PR Newswire: Business Technology - May 29 2013]